High voltage standoff MOS driver circuitry
US4296335A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 29, 1979 |
| Grant date | Oct 20, 1981 |
| Priority date | — |
| Expiry date | Jun 29, 1999 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/01855
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
MOS circuitry conducting constant current at high voltage comprises first, second and third depletion mode MOSFETs connected in a loop, with their gates joined at the junction of the second and third MOSFETs. A control circuit is coupled to the junction of the first and second MOSFETs. The drain of an enhancement mode fourth MOSFET is connected to the junction of the second and third MOSFETs while its source remains unconnected. With high voltage applied to the junction of the first and third MOSFETs, and with the control circuit essentially nonconductive, the fourth MOSFET experiences diode breakdown, thereby acting as a high voltage source which prevents gate oxide rupture on the first, second and third MOSFETs and causing the first and second MOSFETs to become nonconductive until the control circuit is again rendered conductive.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.