Multiple input window detector
US4300063A · kind A · utility
9Cited by
5References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 26, 1979 |
| Grant date | Nov 10, 1981 |
| Priority date | — |
| Expiry date | Nov 26, 1999 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R19/0038
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A multiple input window detector is disclosed which includes a balance pair of common base PNP transistors having multiple emitters connected to respective inputs for comparing either input to an upper threshold level established by a voltage divider. A pair of common emitter PNP transistors compare the inputs to a lower threshold level. The two outputs of each comparator are interconnected and the combined currents control an output stage which is driven to one state when both inputs are within the window established by the divider and is driven in the other state if either input is outside the window.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.