Means and method for maintaining synchronization of a spread spectrum or other receiver clock
US4301537A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 6, 1979 |
| Grant date | Nov 17, 1981 |
| Priority date | — |
| Expiry date | Nov 6, 1999 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0083
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A system for synchronizing a clock signal generated by a lower stability clock generator to a received incoming signal whereby a higher stability clock generator is synchronized to the lower stability clock generator when the clock signal is synchronized to the incoming signal, and the lower stability clock generator is synchronized to the higher stability clock generator when the incoming signal is lost. More specifically, in a spread spectrum receiver for receiving a signal phase modulated by a pseudo-random code, a means for synchronizing a receiver pseudo-random code generator to the incoming code modulation is provided. The code generator is clocked by a relatively low stability voltage controlled crystal oscillator (VCXO) whose output frequency is controlled by an error signal created by a phase difference between the received code modulation and the output of the pseudo-random code generator. As the low stability VCXO tracks the code modulation, a high stability VCXO is provided to track in frequency and phase the low stability VCXO. If the incoming signal is lost, the high stability VCXO is configured to hold its frequency and phase and to control the frequency and phase of…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.