CMOS Circuit for converting a ternary signal into two binary signals, and use of this CMOS circuit
US4302690A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 13, 1979 |
| Grant date | Nov 24, 1981 |
| Priority date | — |
| Expiry date | Aug 13, 1999 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M5/16
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The ternary-binary conversion is reached by two CMOS inverters dimensioned extremely unsymmetrically with regard to their W/L ratio and connected in parallel at their inputs. By further addition of a NAND or a NOR gate the circuit can be used in an integrated circuit as option releasing stage without additional terminal for the option signal which has only to be chosen as the middle value of the ternary signal whereas its lower and upper values are the binary signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.