Diagnostic/debug machine architecture
US4312066A · kind A · utility
68Cited by
6References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 28, 1979 |
| Grant date | Jan 19, 1982 |
| Priority date | — |
| Expiry date | Dec 28, 1999 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2236
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system is described for enabling the connection of a diagnostic/debugging processor to another host processor for the purpose of troubleshooting that processor's hardware and software. The system is composed of an interface between the diagnostic/debugging processor per se and the host processor to be diagnosed, and of software resident in the diagnostic processor to perform functions required by the user of the system. The system is specifically designed for use with a host processor utilizing LSSD design rules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.