Dense nonvolatile electrically-alterable memory devices with four layer electrodes
US4314265A · kind A · utility
59Cited by
14References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 24, 1979 |
| Grant date | Feb 2, 1982 |
| Priority date | — |
| Expiry date | Jan 24, 1999 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/683
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A compact, floating gate, nonvolatile, electrically-alterable memory device fabricated with four layers of polysilicon is described. A particular form of the device utilizes asperities to promote tunnel current flow through relatively thick oxides by means of relatively low average applied voltages. The use of four electrode layers leads to an extremely dense cell and memory array configuration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.