Multiplier circuit
US4316107A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 28, 1979 |
| Grant date | Feb 16, 1982 |
| Priority date | — |
| Expiry date | Feb 28, 1999 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06G7/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multiplier circuit for controlling gain amplification of an electrical input signal responsively to a control signal comprises log conversion means for producing a log signal as a logarithmic function of the input signal, means for producing a multiplier signal as a function of the sum of the log signal and the control signal and antilog-conversion means for producing an antilog signal as an antilogarithmic function of the multiplied signal. The improvement is characterized by the log conversion means and antilog conversion means each including passive elements capable of exhibiting log-linear and antilog-linear transfer characteristics. The passive elements are preferably in the form of diode elements connected in a diode bridge.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.