Digital bus and control circuitry for data routing and transmission
US4320452A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 1978 |
| Grant date | Mar 16, 1982 |
| Priority date | — |
| Expiry date | Jun 29, 1998 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The digital bus is an asynchronous, linear, open-ended digital bus which is coupled to two or more computer/controllers. The bus includes address control circuit lines comprising a bus busy line used by a controller to assert a bus busy signal thereon to gain control of the bus, and to determine if another computer/controller is using the bus, a receiver computer/controller request line used by a controller for requesting permission to send data to another controller, and a receiver computer/controller ready line used by a controller for indicating that that controller is ready to receive data. Data control circuit lines are also provided comprising a data ready line used by a controller for placing a ready-to-send-data signal thereon and a data accept line used by a controller for placing a ready-to-accept-data signal thereon. Also, address bus circuit lines are provided comprising five binary address lines used by a controller for placing an address thereon, which address can have up to five bits. The bus further includes sixteen data bus circuit lines coupled to the two or more controllers. Data to be transferred by a controller is placed on the data circuit lines. A voltage sou…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.