Communication controller transparently integrated into a host CPU
US4322793A · kind A · utility
22Cited by
2References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 26, 1979 |
| Grant date | Mar 30, 1982 |
| Priority date | — |
| Expiry date | Dec 26, 1999 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/385
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Communication control functions are performed by an integrated adapter implemented as microcode resident in host CPU storage. The integrated adapter shares a common high speed bus with other CPU facilities. A high speed bus adapter provides an interface between the common high speed bus and low speed line adapters. Communication controlling commands and register structures are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.