Voltage supression circuit for a voltage converter circuit
US4323957A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 16, 1980 |
| Grant date | Apr 6, 1982 |
| Priority date | — |
| Expiry date | May 16, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/33507
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A voltage conversion circuit includes a transformer having a primary winding and a secondary winding with an output terminal. The primary winding is coupled in series with a switching circuit across a source of DC potential. The switching circuit periodically interrupts the DC potential to the primary winding and upon the interruption the primary winding undesirably produces a switching circuit damaging voltage spike. A voltage suppression circuit is responsive to the voltage polarity reversal in the transformer primary, which occurs when the input voltage is interrupted thereto for transferring the energy, which would otherwise produce the voltage spike, to the converter output terminal to add energy thereto. When the switching circuit is non-operational no voltage reversals are present in the transformer and no voltage is therefore passed to the output terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.