Analog-to-digital converter
US4325055A · kind A · utility
10Cited by
3References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 26, 1979 |
| Grant date | Apr 13, 1982 |
| Priority date | — |
| Expiry date | Oct 26, 1999 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/46
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog-to-digital converter using MOS-charge redistribution techniques performs an N-bit analog-to-digital conversion with only N steps, using two capacitors. These capacitors enable obtaining at each step a reference voltage VRi=VR/2.sup.i and either to compute a voltage Vi+1=Vi-VRi if the i.sup.th bit is equal to 1 or to retain the voltage Vi+1=Vi if the i.sup.th bit is equal to 0. At each step, the voltage Vi is compared to the reference voltage VRi in order to determine the value of the i.sup.th bit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.