Multiple layer, ceramic carrier for high switching speed VLSI chips
US4328530A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 1980 |
| Grant date | May 4, 1982 |
| Priority date | — |
| Expiry date | Jun 30, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10015
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A module carrying microcircuit LSI chips includes stacks of parallel ceramic sheets carrying thin capacitor plates laminated in a ceramic structure in which the capacitor plates either serve (1) as the power distribution conductors known as power planes or (2) are connected to power conducting vias which pass through the capacitor plates. Those vias connect to the appropriate capacitor plates electrically, thereby locating the capacitance required as close as possible to the solder bonds between the chips and the carrier. Stacks of laminated ceramic capacitors serving as power planes can be inserted into slots in laminated ceramic sheets providing the first arrangement above. Signal vias are provided about the periphery of the power planes. A highly parallel distribution of current is provided by means of horizontal power conducting straps which reduce voltage fluctuations, electrical resistance, and current per via.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.