Boolean logic processor without accumulator output feedback
US4331893A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 28, 1979 |
| Grant date | May 25, 1982 |
| Priority date | — |
| Expiry date | Nov 28, 1999 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30094
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A clocked digital Boolean processor which responds to operation code signals and to successive single bit input (operand) signals to drive a single bit accumulator to output the successive answers of chained Boolean operations. The hardware elements are configured such that no feedback of the accumulator output (the previous answer) is required because the logic circuits determine the setting or resetting of the accumulator regardless of what the previous answer was--and yet such that the new answer represents the result of a LOAD, AND, OR or EX-OR operation performed as if the input operand and the previous answer were taken as two operands.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.