Precision negative impedance circuit with calibration
US4331913A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 2, 1980 |
| Grant date | May 25, 1982 |
| Priority date | — |
| Expiry date | Oct 2, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04M19/001
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A negative impedance circuit comprising a level shifter and a current mirror, includes calibration circuitry for adjusting the negative impedance to provide the precise amount of current required to compensate for current drain caused by a known impedance at varying voltage levels. A divider/multiplier circuit is connected to the line which has the known impedance and provides a signal which is directly proportional to the voltage level on the line to the level shifter which, in turn, provides a corresponding control current to the current mirror. The current mirror provides a proportional current to the line current supplied by the current mirror and may be measured at a calibration resistor and the divider multiplier circuit may be adjusted to the appropriate ratio until the exact amount of current required to offset the drain to the precision resistor is provided by the current mirror.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.