Memory control system
US4333160A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 1979 |
| Grant date | Jun 1, 1982 |
| Priority date | — |
| Expiry date | Nov 19, 1999 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/1809
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A memory control system comprises a first memory supplied with an incoming modulated digital signal which is formed by subjecting an analog signal to digital signal processing of discontinuous level modulation system, and a first control circuit for supplying a control signal to the first memory. The first control circuit producing the control signal for controlling the first memory in such a manner that the total memory capacity of the first memory is partitioned into a plurality (k) of memory capacity segments having given capacity values (lengths) for use, and the modulated digital signal is written in and further the modulated digital signal thus written in is read out with the order thereof rearranged, interrelatedly with the circulation of addresses through the plurality of divided memory capacity segments while maintaining constant the relationship in terms of capacity values (lengths) between the plurality of divided memory capacity segments.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.