High-accuracy multipliers using analog and digital components
US4334277A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 11, 1978 |
| Grant date | Jun 8, 1982 |
| Priority date | — |
| Expiry date | Dec 11, 1998 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06J1/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus multiplies two sequences of digital numbers a.sub.i and b.su, which may represent signal pulses of various amplitudes. A first plurality of t read-only memories (ROMs), have a common input adapted to receive the sequence of numbers a.sub.i, each ROM coding the numbers a.sub.i into a.sub.j,i =a.sub.j modulo m.sub.i, 0.ltoreq.a.sub.j,i .ltoreq.m.sub.i -1. A first plurality of t means, extend the digital signal with zero values, the number of zeroes being determined by the length N of the sequences being convolved. A first plurality of t D/A converters, convert the digital quantity received from the extender into its corresponding analog value. Similar ROMs, extending means, and D/A converters process the sequence numbers b.sub.i. A plurality of t means convolve two input analog signals, one from each of the first and second D/A converters, the output of each convolving means being an analog signal, approximately equal to the convolution (a.sub.j,i) * (b.sub.j,i) modulo m.sub.i. A plurality of t A/D converters, convert the analog signal back to digital form. A plurality of t means multiply by an integer u.sub.i. The integer u.sub.i is defined by the relationship u.sub.i =…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.