Time division multiplex switching network with an associative buffer store of the register counter type
US4334304A · kind A · utility
Inventor
Key dates
| Filing date | May 8, 1980 |
| Grant date | Jun 8, 1982 |
| Priority date | — |
| Expiry date | May 8, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A time division multiplex switching network comprises a data word circulating store and a random address circulating store. These two circulating stores are synchronous and have data word registers and random address registers respectively associated two by two. The bytes in the time-slots of an incoming supermultiplex highway are written in the data word registers and addresses depending on the outgoing time slots which are to be connected are written in the random address registers. These addresses are incremented at each step of the random address circulating store. When the incremented address reaches a predetermined value, a data word is read in the data word circulating store.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.