Electronic balance control circuit arrangement
US4335321A · kind A · utility
5Cited by
1References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 14, 1979 |
| Grant date | Jun 15, 1982 |
| Priority date | — |
| Expiry date | Dec 14, 1999 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05B23/027
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
An electronic balance control circuit includes an OP-AMP comparator circuit for receiving a command signal and a feedback signal. A positive OP-AMP detector circuit for causing a first buffer trigger circuit to fire a first triac to energize a first output when the command signal is less than the feedback signal, and a negative OP-AMP detector for causing a second buffer trigger circuit to fire a second triac to energize a second output when the command signal is greater than the feedback signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.