Current ramping controller circuit
US4339669A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 1980 |
| Grant date | Jul 13, 1982 |
| Priority date | — |
| Expiry date | Jul 8, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/665
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit responsive to a supplied control input signal for alternately sourcing and sinking current at an output the values of which are accurately matched comprising a single current reference source and a single NPN current mirror circuit. The current reference source is unilaterally coupled to the output when the circuit is in a first mode of operation to provide the source current and is coupled to the NPN current mirror circuit which is rendered conductive in a second mode of operation to provide the input current to said current mirror. The output of the current mirror being coupled to the output sinks current thereat which is substantially equal to the input current supplied thereto. The NPN current mirrors comprises a pair of matched transistors having the bases and emitters interconnected at first and second nodes respectively. The collector of the first one of the matched transistors is coupled to the current reference source with the collector of the second transistor being coupled to the output of the circuit. A base current cancellation transistor is utilized to supply the base current drive to the two transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.