Radio receiver having phase locked loop frequency synthesizer
US4339826A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 1980 |
| Grant date | Jul 13, 1982 |
| Priority date | — |
| Expiry date | Jul 1, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03J5/0281
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A radio receiver comprises a frequency conversion circuit connected between a frequency-variable local oscillator and a divide-by-N programmable counter incorporated in a phase locked loop frequency synthesizer and adapted to continuously change the frequency to be divided by the programmable counter. Owing to the frequency conversion circuit, the local oscillator frequency is permitted to continuously change in the locked state of the phase locked loop so that the intermediate frequency offset adjustment of receivers, that is, the adjustment of the intermediate frequency of each receiver to the center frequency of an intermediate frequency filter used in the receiver can be made easily, and that a reception of such a broadcast station as having a carrier frequency which is not an integral multiple of a channel spacing frequency also can be made.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.