Integrated circuit package
US4342069A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 13, 1981 |
| Grant date | Jul 27, 1982 |
| Priority date | — |
| Expiry date | Feb 13, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated semiconductor package containing circuitry capable of supporting separately packaged semiconductors to achieve greater circuit board density and to allow separate semiconductor packages which cooperate with the supporting semiconductor package and die to be interchanged. The supporting die is interconnected electrically to lead pins and socket contacts using conductive circuitry compatible with the other semiconductor die. In a first embodiment corresponding metallization patterns are used to electrically interconnect an integrated circuit package to a conventional printed wiring board or ceramic wiring board containing socket contacts to receive lead pins from another integrated circuit package. A second embodiment is a unitized package containing integral socket contacts within the unitized integrated package to receive lead pins from another integrated circuit package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.