Process for making semi-conductor devices
US4343081A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 1980 |
| Grant date | Aug 10, 1982 |
| Priority date | — |
| Expiry date | Jun 17, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/675
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a process for making semi-conductor components on an amorphous substrate, comprising two phases, wherein, in a first phase, the substrate is introduced into a deposition chamber and a uniform deposit is made of four successive primary layers on all this substrate, without contact with the outside atmosphere: a first layer of protective insulating material, a second layer of semiconductor material, a third layer of insulating material, of smaller thickness than the first layer, and finally a fourth layer of a metal; and, in a second phase, the substrate coated with these four layers is withdrawn from the deposition chamber and the last three layers are subjected to photoetching and ancillary deposition operations, which are appropriate for the structure of the component to be obtained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.