Patent · US Expired

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US4343388A · kind A · utility

4Cited by
6References
1Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 21, 1980
Grant dateAug 10, 1982
Priority date
Expiry dateAug 21, 2000

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/117
  • WIPO fieldHandling
  • WIPO sectorMechanical engineering

Abstract

Diode chips (44) are cut from a p-n sheet-diffused semiconductor wafer (41). Instead of having conventional rectangular shapes, the chips have a rhomboidal shape. This makes the shape of the chips asymmetric in that one surface (46) of each chip becomes a distinguishable mirror image of its other surface (47). The direction of the p-n junction in the wafer is oriented with respect to the shape of the chips to be cut to place the same conductivity type region adjacent to the same rhomboidal shape of the surface. The shape of the chips (44) thereby aids apparatus (59) to sort the chips into two groups, each group consisting of chips of the same polarity or orientation of their p-n junctions with respect to a common support plane. The apparatus (59) includes a feed track (60) leading to a fork (61) in the track. A center obstruction (62) engages the leading edge of the chips (44) and deflects the chips into one or the other of two branch tracks (63) or (64), depending on the slope of the leading edge of the chips.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.