System for design and production of integrated circuit photomasks and integrated circuit devices
US4343877A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 2, 1981 |
| Grant date | Aug 10, 1982 |
| Priority date | — |
| Expiry date | Jan 2, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/00
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
System for design and production of integrated circuit photomasks and integrated circuit devices wherein the four adjacent corners of each circuit topography pattern on each photomask and each wafer chip area are set aside as designated information locations. One of the designated information locations containing a two-dimensional rectangular array of locations for use as a mask sequence array and a second of the designated information locations containing a two-dimensional rectangular array of locations for use as an alignment key pattern array. The third designated information location serves as a product identification area which may include a manufacturer name and a product identification code. The fourth designated information location is adapted to serve as a test device area and may also serve as a part identification area in semiconductor processes employing a two layer metal interconnect system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.