Method and apparatus for eliminating double bit errosion in a differential phase shift keying system
US4346472A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Aug 7, 1980 |
| Grant date | Aug 24, 1982 |
| Priority date | — |
| Expiry date | Aug 7, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/2035
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A code converting circuit of simple construction composed of an exclusive OR circuit and a flip-flop circuit is provided on each of transmitting and receiving sides of a digital data transmission system according to a differential phase shift keying system, to convert two consecutive errors on adjacent bits peculiar to the differential phase shift keying system into only an error on a single bit. As a result, it is not required to employ a code having an excellent error-correcting capacity in the digital data transmission system, and thus a high transmission efficiency is attained by the use of a code which is relatively deficient in error correcting capacity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.