Buffer system for supply procedure words to a central processor unit
US4349874A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 15, 1980 |
| Grant date | Sep 14, 1982 |
| Priority date | — |
| Expiry date | Apr 15, 2000 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6022
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a data processing system, a central processor unit requests procedural data words or non-procedural data words stored in the system memory. A control store device executes firmware instructions including a local bus field for controlling the transfer of the requested procedural data words and non-procedural data words to the central processor unit. The requested procedural data words and non-procedural data words are transferred to the central processing unit by an interfacing device including a data bus latch for receiving the procedural data words and non-procedural data words transferred from the memory, a prefetch buffer for storing up to four words, a first set of OR gate circuits for selectively transferring the procedural data words stored in the prefetch buffer to a procedural data multiplexer for assembling either a procedural data word or a procedure address, and a second set of OR gate circuits for selectively transferring either a procedural data word or non-procedural data word to the source bus or a procedural data address or non-procedural data address to the source bus for transfer to the central processor unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.