Combinational logic for generating gate drive signals for phase control rectifiers
US4351022A · kind A · utility
Inventors
Key dates
| Filing date | Jun 30, 1981 |
| Grant date | Sep 21, 1982 |
| Priority date | — |
| Expiry date | Jun 30, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/1626
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Control signals for phase-delay rectifiers, which require a variable firing angle that ranges from 0.degree. to 180.degree., are derived from line-to-line 3-phase signals (.phi.A, .phi.B, .phi.C) and both positive and negative firing angle control signals (+.alpha. and -.alpha.) which are generated by comparing (at 20) current command and actual current (sensed at 16). Line-to-line phases are transformed (32) into line-to-neutral phases and integrated (at 34) to produce 90.degree. phase delayed signals (A.phi., B.phi., and C.phi.) that are inverted (at 26a, b, c) to produce three cosine signals (C, A and B RAMP) such that for each its maximum occurs at the intersection of positive half cycles of the other two phases which are inputs to other inverters. At the same time, both positive and negative (inverted) phase sync signals are generated for each phase by comparing (at 27a, b, c) each with the next and producing a squarewave when it is greater. Ramp, sync and firing angle control signals are then used in combinational logic (FIG. 5) to generate the gate firing control signals for SCR gate drives (30) which fire SCR devices in a bridge circuit (24).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.