Packaging system for semiconductor burn-in
US4351108A · kind A · utility
11Cited by
6References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 7, 1980 |
| Grant date | Sep 28, 1982 |
| Priority date | — |
| Expiry date | Jul 7, 2000 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/53183
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
This invention relates generally to burn-in apparatus and methods for stressing the physical and electrical limits of electronic components under controlled environmental and load conditions and more particularly to a system for temporarily packaging a plurality of semiconductors such that they can be connected to a common electrical input while under controlled environmental conditions including extremes of temperature. The invention has special utility in the handling of integrated circuit devices of the dual-in-line packaging type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.