Readout circuit for a monolithically integrated circuit for linear image scanning

US4353084A · kind A · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventors

• Heiner Herbst · Haar, DE
• Matthias Niemeyer · Hannover, DE

Key dates

• Filing date: Jul 24, 1980
• Grant date: Oct 5, 1982
• Expiry date: Jul 24, 2000

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10F39/158

Abstract

A monolithically integrated circuit for linear image scanning is coupled through clock pulse-supplied transfer gates to a number of readout charge transfer devices and has an overflow drain zone and an overflow gate disposed between the drain zone and the sensors connected to a clock pulse for selectively permitting transfer of charge between the sensors and the drain zone, with the sensors divided into groups representing image lines. The linear image scanning circuit operated by the interlacing method by which partial images are generated by different groups of sensors. The clock pulse controlling the overflow gate restricts the integration times of the various groups of sensors so that during the scanning of the partial images generated thereby, overlapping of the image data of one line of adjacent partial images is eliminated.