Two dimensional interpolation circuit for spatial and shading error corrector systems
US4354243A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 1980 |
| Grant date | Oct 12, 1982 |
| Priority date | — |
| Expiry date | Apr 11, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N23/81
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Data for providing spatial and shading error correction signals during the operating mode of a television camera, are taken from a two dimensional array of correction points distributed across a television image during the camera setup mode and are stored as 8 bit words. The error correction signals extend smoothly (linearly) between the correction points. The smoothing is performed by selectively interpolating selected reference points on each video line to provide values which vary smoothly from one row of correction points to the next. A vertical interpolation circuit performs a vertical interpolation on a line-by-line basis, by adding signals produced by a multiplying D/A converter when loaded with the two values to be interpolated and weighted by factors related to the distance from each correction point. The results of the vertical interpolation circuit are fed to a horizontal interpolation circuit which ramps linearly from one reference point to the next, to provide the spatial and shading error correction output signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.