Processing unit for multiplying two mathematical quantities including at least one complex multiplier
US4354249A · kind A · utility
21Cited by
5References
6Claims
0Family size
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Key dates
| Filing date | Mar 24, 1980 |
| Grant date | Oct 12, 1982 |
| Priority date | — |
| Expiry date | Mar 24, 2000 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/4812
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The processing unit includes at least one complex multiplier having hour multiplying circuits for multiplying the real and imaginary components of two complex vectors and combining the products to produce a complex output vector. Representing the input complex vectors by (A+jB) and (C+jD) the output complex vector becomes (AC-BD)+j(BC+AD). The combining circuits can be switched so that one of the input complex vectors is conjugated and the output complex vector becomes (AC+BD)+j(BC-AD). Thus, the present processing unit can provide the dot product of two complex vectors or the like.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.