Dual function error correcting system
US4359772A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 14, 1980 |
| Grant date | Nov 16, 1982 |
| Priority date | — |
| Expiry date | Nov 14, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/19
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A dual function cyclic code error correcting method and system are disclosed for correcting from a single syndrome byte a random single-bit error which occurs in a multi-byte data word or, alternatively, correcting a multi-bit error in one byte of the data word by providing an indication of the location of the byte in error, and employing the same syndrome byte to determine the error pattern of the multi-bit error so the multi-bit error can be corrected. The method involves non-zero syndrome processing steps which comprise a first series of steps which function to determine if the non-zero syndrome correlates to a 1-bit error in one of the byte positions of the data word being protected, and if so, to automatically correct the single-bit error by processing the entire byte containing the single-bit error. If no correlation of the syndrome byte is established with a single-bit error, then the byte position in the data word of the multi-bit error is used during a second series of steps to process the same non-zero syndrome byte to determine the pattern of the multi-bit error in the defective byte so that the pattern can be employed to correct the defective byte. The method and appara…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.