High speed squelch circuit
US4359780A · kind A · utility
7Cited by
8References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 6, 1980 |
| Grant date | Nov 16, 1982 |
| Priority date | — |
| Expiry date | Aug 6, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G3/344
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high frequency squelch circuit for communications receivers with relatively long time delay when operating on weak signals with a short time delay on strong signals which completely eliminates any audible noise burst, and with continuously variable delay as an inverse function of signal strength at intermediate signal levels. The high speed squelch performance is achieved without degrading chatter performance by operating at frequencies above the audio range and utilizing wider noise bandwidth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.