Device for increasing the length of a logic computer address
US4361868A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 3, 1979 |
| Grant date | Nov 30, 1982 |
| Priority date | — |
| Expiry date | Jul 3, 1999 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing machine having a device for extending the length of the logic address to (M+N) bits, so that 2.sup.M+N different logic addresses can be formed and become available to the programmer. The original data structure of a computer having a word length of only N bits is then maintained. Programs written for the original machine can be executed without modification. A register bank of a data processing machine having its extension has a first section having a width of N bits which forms the least-significant side or tail, and a second section which has a width of M bits and which forms the more significant side or head. The first section is used in all instructions which utilize an operand from a register or which store an operand in a register, in the same manner as in the computer without the extension. The second section is used only if reference is made to the memory while using a register as a base register or as an index register; or if a special, new instruction is issued in order to load or store the content of the register thus addressed. The M additional address bits in the extension of the register provide the bits of higher significance in a physical or virtua…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.