Channel zero switching arrangements for digital telecommunication exchanges
US4365330A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 6, 1980 |
| Grant date | Dec 21, 1982 |
| Priority date | — |
| Expiry date | Aug 6, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q11/04
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
It is an emerging international telecommunications requirement that all 32 channels of the p.c.m. multiplex must be switchable. The switching of channel zero relates to the "spare bits" not defined for synchronization purposes and these bits may be used as a data-bearer for network administration or control purposes. Digital telecommunication switching network, therefore, must be capable of concentrating channel assemblies of these spare bits into one transmit multiplex which may be connected to a spare bit data processor remote from the switching network or co-located with it. The passing of channel zero into the switch block, however, is dangerous because if this data is passed across the switch block to another digital line termination unit DLT in a time slot other than channel zero, then that receiving DLT will be called upon to transmit data containing two valid sets of sync and non-sync patterns which could confuse the synchronization circuits associated with the digital transmission system connected to that DLT. Such an arrangement is prevented using equipment in the receive and transmit DLT's. In the receive DLT after the incoming synchronization channel has fulfilled its s…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.