Patent · US Expired

Fabrication technique for junction devices

US4370359A · kind A · utility

22Cited by
6References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 18, 1980
Grant dateJan 25, 1983
Priority date
Expiry dateAug 18, 2000

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10N60/0912

Abstract

A self-aligning technique is used to produce small area junctions such as small area Josephson junctions. A base layer having a thickness corresponding to one dimension of the junction is first deposited. An insulating material is then deposited from a source positioned so that the base layer itself masks its edge from the insulator being formed. This procedure coats the base layer with an insulator, but leaves an edge of this layer free of insulation. A junction is then completed on this uncoated edge.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.