I/O Controller for transferring data between a host processor and multiple I/O units
US4371932A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 25, 1981 |
| Grant date | Feb 1, 1983 |
| Priority date | — |
| Expiry date | Nov 25, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/282
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An I/O controller for transferring data between a host processor and one or more I/O devices. This I/O controller includes a microprocessor, a direct memory access controller and a dual port storage unit, one port of which is coupled to the host processor I/O channel bus and the other port of which is coupled to the microprocessor bus. All data transfers are by way of the dual port storage unit. The I/O controller includes an interleaving mechanism for enabling concurrent performance of two different modes of data transfer between the host processor and the I/O controller. In particular, this interleaving mechanism enables host processor direct program control (DPC) data transfers to be performed at the same time that the I/O controller is busy doing cycle steal data transfers for a block of data. These DPC data transfers are accomplished without interrupting the cycle stealing operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.