Integrated CMOS process with JFET
US4373253A · kind A · utility
23Cited by
8References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 13, 1981 |
| Grant date | Feb 15, 1983 |
| Priority date | — |
| Expiry date | Apr 13, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/858
Abstract
A process for fabricating JFET devices into a conventional CMOS monolithic IC. The combination of devices provides linear circuit operation with low noise characteristics.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.