Method of making oxide passivated mesa epitaxial diodes with integral plated heat sink
US4373255A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 3, 1981 |
| Grant date | Feb 15, 1983 |
| Priority date | — |
| Expiry date | Jun 3, 2001 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/977
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An oxide passivated mesa epitaxial diode with an integral heat sink, and a process by which it may be fabricated. The passivation layer of highly pure thermally grown SiO.sub.2 is formed over the mesa walls in the region of the pn junction without causing a reaction between the contact metals and their surroundings during the high temperature environment imposed during thermal growth. The heat sink is deposited after the SiO.sub.2 passivation has been grown, replacing a polycrystalline silicon layer beneath the mesa formation which was used as a temporary structural support. Dopant, to form the pn junction, is introduced into the silicon wafer after the formation of the passivation layer but before the heat sink is deposited.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.