Receiving circuit
US4375037A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 6, 1981 |
| Grant date | Feb 22, 1983 |
| Priority date | — |
| Expiry date | Jan 6, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/082
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
In a receiving circuit wherein a digital input signal is compared with a reference voltage and is regenerated into a pulse information signal of "1" or "0" value, a circuit for producing the reference voltage is constructed of a peak detector circuit which detects the maximum value of the output of a preprocessing circuit for the input signal, a reference preprocessing circuit which has the same circuit arrangement as that of the first-mentioned preprocessing circuit except for receiving no input signal, and a voltage divider circuit which divides the sum of the output of the peak detector circuit and an output of the reference preprocessing circuit. With such an arrangement, even when the amplitude of the input digital signal has fluctuated, a pulse signal whose pulse width is subjected to substantially no variation can be regenerated by means of the simple circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.