Parallel to serial converter
US4377806A · kind A · utility
15Cited by
7References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 13, 1981 |
| Grant date | Mar 22, 1983 |
| Priority date | — |
| Expiry date | May 13, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/1809
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A parallel to serial converter is described for recording channel applications, wherein a coded symbol comprising a plural number of bits is to be rotated or converted to a serial stream. The converter includes a variable delay section which accepts the parallel code inputs on a plurality of lines and delays each input bit a predetermined number of counts, depending upon which line it is input on. The delay unit supplies a selector array of gates with bit signals, and the selector array reorders the bits into the desired serial stream. An output register is provided to reclock the serial stream prior to further channel processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.