Serial analog video processor for charge coupled device imagers
US4378571A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 6, 1981 |
| Grant date | Mar 29, 1983 |
| Priority date | — |
| Expiry date | Jul 6, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/41
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A circuit for stitching and balancing the outputs of two CCD arrays is described. The field of view of a high resolution CCD raster input scanner can be doubled by using a CCD array for each half of the scan. Then the CCD output analog pulses must be stitched together, the dc level equalized and restored to a common value, and the gains adjusted to match the video levels from the two CCD devices. The circuit described herein accomplishes these functions at high data rates and at low cost by stitching the video, eliminating the hold step produced by the sample-and-hold circuit, and adjusting the gains, all at the low voltage levels at which the CCD output signals were originally produced, before amplifying the resultant stitched video to a higher voltage level and converting to digital form.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.