Communications subsystem idle link state detector
US4379340A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 6, 1980 |
| Grant date | Apr 5, 1983 |
| Priority date | — |
| Expiry date | Oct 6, 2000 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system includes a communications subsystem communicating with a number of devices. A counter monitors the communication line to detect when a communication line goes idle, that is at least 15 successive binary ONE bits appear on the line for the bit oriented protocol mode. The counter advances on successive binary ONE bits and is forced to a hexadecimal ZERO in response to a binary ZERO. If the counter reaches a count of hexadecimal F (decimal 15) a carry signal from the counter prevents the counter from advancing and initiates an idle link state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.