Method of making a semiconductor switching device
US4380114A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 20, 1981 |
| Grant date | Apr 19, 1983 |
| Priority date | — |
| Expiry date | Feb 20, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A triac device includes a first silicon chip having regions of alternate conductivity type disposed in a PN-junction forming relationship which defines a center-fired triac. A second silicon chip having regions defining a diac is bonded to the gate region of the triac chip. A copper layer of about 1 to 5 mils in thickness is bonded to the portions of the top major face of the triac chip that surround the gate region. Cathode, anode and gate connections are provided to the two-chip subassembly which is then encapsulated. The copper layer permits a smaller cathode connection to be made to the top of the triac chip without reducing the current capacity of the device. The triac device is mass-produced by first forming a plurality of triac chips in a two-dimensional array in a large area silicon wafer. The copper layers and diac chips are formed on the wafer prior to its separation into separate diac-triac chip subassemblies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.