Frequency synthesizer of the phase lock loop type
US4380743A · kind A · utility
22Cited by
2References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 19, 1981 |
| Grant date | Apr 19, 1983 |
| Priority date | — |
| Expiry date | Jan 19, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/081
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a phase lock loop frequency synthesizer, a successive addition rate multiplier provides a correction signal for eliminating ripple in a frequency control signal applied to a variable frequency oscillator which produces the output frequency of the synthesizer. Ripple elimination is improved by means of a feedback loop by which any residual ripple is detected and the correction signal is automatically adjusted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.