Digital-to-analog converter with error compensation
US4381495A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 1980 |
| Grant date | Apr 26, 1983 |
| Priority date | — |
| Expiry date | Oct 8, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/74
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital-to-analog conversion system includes a digital-to-analog converter, a source of at least one set of digital input signals and a signal for error compensation and a digital signal for error detection to the converter, a switch to selectively couple either the one set of digital input signals and the signal for error compensation or the signal for error detection to the converter, a clock to generate a switching signal having a predetermined period and duration which is coupled to control the switch, a distribution switch for selectively coupling the output of the digital-to-analog converter to two different terminals, receiving a control input from the clock, a sample and hold circuit to sample and hold the output of the digital-to-analog converter, a detector for detecting a linearity error in the digital-to-analog converter output signal when the digital signal for error detection is coupled as an input thereto, a memory for storing the output of the detector, a circuit to write the output of the detector into the memory, and a circuit to read the data from said memory and couple it as the signal for error compensation at the input to the digital-to-analog converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.