High performance submicron metal-oxide-semiconductor field effect transistor device structure
US4384301A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 9, 1981 |
| Grant date | May 17, 1983 |
| Priority date | — |
| Expiry date | Oct 9, 2001 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/21
Abstract
A novel metal-oxide-semiconductor (MOS) field effect transistor having enhanced oxide thickness at the edge of the gate electrode and having metal silicide regions in the gate electrode and source and drain areas. The enhanced oxide thickness improves interconnect-to-interconnect breakdown voltage in multilevel interconnect devices as well as minimizing gate overlap of source and drain. The metal silicide regions reduce series resistance and improve device speed and packing density.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.