Circuit including an MOS transistor whose gate is protected from oxide rupture
US4385337A · kind A · utility
38Cited by
5References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 12, 1981 |
| Grant date | May 24, 1983 |
| Priority date | — |
| Expiry date | Jun 12, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/601
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A protected MOS transistor circuit includes an input MOS transistor and a depletion mode MOS transistor having a drain-source current path connected between ground and the gate of the input MOS transistor of obviating rupture of the gate oxide of the input MOS transistor when power is off. The depletion mode MOS transistor's gate receives a control signal only when power is on which renders the depletion mode MOS transistor nonconductive when power is on. The depletion mode MOS transistor is conductive when power is off.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.