Discrete cosine transformer
US4385363A · kind A · utility
80Cited by
4References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 20, 1981 |
| Grant date | May 24, 1983 |
| Priority date | — |
| Expiry date | Apr 20, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/50
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An improved method and apparatus for calculating discrete cosine transform coefficients from a plurality of digitalized data is disclosed. The pipelined processor utilizes two basic types of circuits arranged in five computational stages. Shuffle and add circuits operate upon prearranged data components at the first, second and fourth stages, while shuffle, add and multiply circuits are used at the third and fifth stages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.