Recognition logic circuit for bar code reader systems
US4387298A · kind A · utility
38Cited by
1References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 27, 1981 |
| Grant date | Jun 7, 1983 |
| Priority date | — |
| Expiry date | Nov 27, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06K7/1456
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic recognition circuit is described for use in bar code reader systems having postal and commercial applications. Such systems may be required to read codes which are of relatively poor print quality. The present circuit utilizes statistical auto-correlation techniques to reject extraneous ink dots and minor print voids commonly associated with such printing. Additionally, the circuit is skew tolerant and both position and velocity independent of the bar code being processed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.